Topic
Chip design approach that uses an entire silicon wafer as a single processor instead of cutting it into dies, boosting compute density and bandwidth.
OpenAI has contracted 750MW of Cerebras wafer-scale inference capacity, delivered in three 250MW segments by the end of 2028. The dates are contractual, but neither company has published pricing, latency figures or a plan for which customers get access.
Reality
Gimlet Labs plans 100 MW of Cerebras-powered inference capacity, pairing wafer-scale chips with GPUs for different phases of each request. For buyers, the quoted 3,000 tokens per second is a company target until measured results appear.
Reality
More memory on a Cerebras wafer arrives with CS-6, two generations out. Everything shipping before then, Nexus included, is rack engineering around the SRAM budget the wafer already has, and long contexts are where that budget hurts.
Reality
The first third-party benchmark of the LP30 rack came in at roughly four times the next-fastest public endpoint, measured one request at a time on a model small enough to fit.
Reality
The Nexus rack, not the WSE-3, is now the thing Cerebras ships. That makes upgrade cadence the number buyers should price, and 10,000 tokens per second a target rather than a plan input.
Reality
The first multi-wafer Cerebras system pairs a doubled clock with rebuilt power delivery and interconnect. The compute claims rest on WSE-3 Turbo dies that are otherwise unchanged.
Reality