Open Compute Project is a nonprofit community that develops and shares open hardware designs and infrastructure standards for data centers.
Ultra Ethernet Consortium released UEC 1.1 on October 12, adding scale-up support, in-network collectives and programmable congestion control. It gives teams planning AI fabrics a published feature list to check vendors against.
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Cisco, working with Nvidia, announced USFP, an OSFP-sized pluggable that targets 12.8 Tbps from 32 lanes of 400G. The first spec is 16 lanes at 6.4 Tbps, a 4x gain over 1.6 Tbps optics. Only the 32-lane version reaches 8x.
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Nvidia contributed its Vera Rubin rack and compute tray designs to the Open Compute Project at the project's Global Summit in San Jose. Nvidia says builders get common blueprints for racks, networking, power and cooling; the benchmark figures released alongside are its own.
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Cisco told the Open Compute Project summit that its 102.4-terabit Silicon One G300 is now shipping to customers at volume. Buyers can order against those dates. The optics module Cisco showed with Nvidia rests on Cisco's own bandwidth claims.
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Samsung and AMD demonstrated CXL memory pooling at the 2026 OCP Global Summit, letting AI servers borrow idle capacity from a shared pool. Pooling would move memory sizing from each server to the pool, so orders would follow combined cluster load.
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Arista paired its 7060EX7 switches with three Ethernet rack designs, the largest reaching 1,024 accelerators in one scale-up domain across racks. Teams on non-Nvidia chips such as Microsoft's Maia, the market Arista expects to grow, get a second scale-up fabric to evaluate.
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Atomic Machines is shipping PrimeSwitch PS-150, a 150-amp relay and the first device built by its Matter Compiler, to early-access customers for evaluation. Those units are the first outside check on its claim that software can replace device-specific tooling.
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Arista's Etherlink SU-144 links up to 144 accelerators in one Ethernet hop and 1,024 across racks, built on the ESUN initiative. Arista says Nvidia-based racks stay on proprietary NVLink for now, so the open choice belongs to buyers of other accelerators.
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HPE has launched ProLiant Gen13 servers for AI inference on sixth-generation AMD Epyc chips, with the eight-GPU DL585a model due in early 2027. Only the single-socket DL525 is due in 2026, so a Gen13 AI plan for this year has to start with it and add GPUs later.
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The AGI CPU is a 136-core Neoverse part co-designed with Meta. Arm's pitch to custom-silicon customers used to be that it had nothing of its own to sell.
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MetaRoCE ships as a spec, a reference implementation and a compliance suite. That last item is the part vendors will feel, because it decides who gets to claim conformance.
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